MOdel-based DEsign & Verification for Embedded Systems

Systematic Literature Review to Investigate Requirement Specification and Design Verification Approaches for Embedded Systems in Model Based System Engineering

In MODEVES project, the ultimate objective is to provide complete MBSE-based platform, to researchers, practitioners and students, for requirement specification (including temporal properties) and early design verification of diverse embedded systems. To achieve this, it is required to investigate requirement specification (modeling) standards like UML, SYSML and MARTE that have been frequently used to specify structural and behavioral aspects of embedded systems. Moreover, it is necessary to investigate the approaches (e.g. CCSL, OCL etc.) to specify embedded systems temporal properties / constraints at higher abstraction level. Furthermore, it is also mandatory to investigate techniques and tools for both static and dynamic design verification of embedded systems. To target all aforementioned requirements, we perform systematic literature review to achieve particular research objectives. The significant details are summarized below: :-

It is important to mention here that we are just providing the overview of systematic literature review. The complete details will be available online after scientific publications.

Back to Project Status